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一种32位浮点数字信号处理器(DSPs)的外设模型设计

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A 32 bit floating-point digital signal processor peripherals module constructed by VHDL is proposed. Its internal structure and each block's operation process is discussed in detail. The module includes the following peripheral blocks viz.: DMA, data memory controller, program memory controller, external memory interface, peripherals bus controller, timer, interrupt selector and hoot logic. It has many characteristics such as single-clock-access; multi-instructions parallel loading; high-speed cache strategy; four independent channels in DMA, etc.

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A 32 bit floating-point digital signal processor peripherals module constructed by VHDL is proposed. Its internal structure and each block's operation process is discussed in detail. The module includes the following peripheral blocks viz.: DMA, data memory controller, program memory controller, external memory interface, peripherals bus controller, timer, interrupt selector and hoot logic. It has many characteristics such as single-clock-access; multi-instructions parallel loading; high-speed cache strategy; four independent channels in DMA, etc.

Keywords

Computer scienceComputer hardwareInterruptDirect memory accessTimerController (irrigation)Embedded systemVHDL

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