Design and evaluation techniques for detection and coverage estimation of low-level errors

TL;DRAbstract

The evolution of fast, small and low-cost microprocessors has led to their almost pervasive usage in automotive electronics, smart gadgets, communication devices, etc. These mass-market products, when deployed in safety-critical systems, require cost-efficient and dependable (fault tolerant) functionality. In order for the system to provide any degree of reliable services, a key and critical facet is the procedure for detection of the errors that the system is expected to tolerate. This thesis addresses and makes novel contributions in two distinct areas: (a) The design of a cost-efficient solution for detection of low-level errors, and (b) Procedures to quantitatively evaluate the effectiveness of the developed error detection techniques. We also demonstrate the viability of functional level simulations for this objective. As error detection also affects the error handling process, this dependency is considered as well. First different error detection techniques, based on spatial, tem

Chat with Paper

AI Agents for this Paper