Retention Characteristics of Nano-Floating Gate Capacitor with SiC Nano-Particles

TL;DRAbstract

A nano-floating gate capacitor with SiC nano-particles embedded in a SiO(2) layer was fabricated and its electrical properties such as the capacitance-voltage hysteresis curve at various temperature, and the retention were characterized. The SiC nano-particles in the SiO(2) layer were formed by magnetron sputtering of SiC and SiO(2) targets and post-annealing at 900 degrees C for 3 min. They had a spherical shape with an average diameter of 3 similar to 5 nm and were distributed between the tunnel oxide and the control oxide layers. For the nano-floating gate capacitor with SiC nano-particles embedded in a SiO(2) layer; the flat-band voltage shift decreased from 2.2 V at 25 degrees C to about 1.6 V at 85 degrees C and 0.6 V at 1.25 degrees C, when the gate voltages were swept from -8 V to 8 V. Also, the memory window under the programming/erasing operation at +12 V and -12 V for 700 ms appeared to be approximately 0.54 V at 25 degrees C 0.61 V at 85 degrees C and 0.22 V at 125 degrees

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