Book Chapter10.1007/978-3-642-35864-7_68

An Area Efficient and Low Power Multiplier Using Modified Carry Save Adder for Parallel Multipliers

S. Murugeswari,S. Kaja Mohideen-2013-01-01-Communications in computer and information science

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Keywords

AdderMultiplier (economics)Very-large-scale integrationComputer scienceSpeedupElectronic engineeringComputer hardwareArithmetic

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