DSPs as flexible Multimedia Accelerators

TL;DRAbstract

The increase of multimedia data processing requires immense processing power and transfer bandwidth as well as the consideration of real-time requirements. To reduce the CPU load the integration of flexible coprocessors seems to be a promising approach. This paper focuses on the integration of Digital Signal Processors (DSPs) as flexible multimedia accelerators into standard PC architectures running microkernel-based systems. Three components proved essential for multimedia acceleration: First, a data transfer mechanism capable of sustaining at least 30 Mbytes/s transfer rate, second, a DSP kernel with static scheduling and a very efficient context switch and third, a microkernel server running at the host which is responsible for data transfer between DSP and CPU and for calculating DSP schedules. 1. INTRODUCTION The increasing integration of multimedia data into applications requires immense processing power and transfer bandwidth as well as the consideration of real-time requiremen.

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