nth-order multi-bit ΣΔ ADC using SAR quantiser

doi:https://doi.org/10.1049/el.2010.1554

Article10.1049/el.2010.1554

nth-order multi-bit ΣΔ ADC using SAR quantiser

Kwang S. Kim,Jaewook Kim,Seung-Hyun Cho-2010-09-16-Electronics Letters

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TL;DRAbstract

An nth-order multi-bit delta-sigma (ΣΔ) analogue-to-digital converter (ADC) using a successive approximation register (SAR) quantiser is proposed. By exploiting the residue voltage of a multi-bit SAR ADC, the proposed ADC performs as an nth-order noise shaping converter with only one opamp and removes the need for a feedback multi-bit DAC. In addition, the proposed architecture is very reconfigurable and can be implemented as a bandpass ADC.

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An nth-order multi-bit delta-sigma (ΣΔ) analogue-to-digital converter (ADC) using a successive approximation register (SAR) quantiser is proposed. By exploiting the residue voltage of a multi-bit SAR ADC, the proposed ADC performs as an nth-order noise shaping converter with only one opamp and removes the need for a feedback multi-bit DAC. In addition, the proposed architecture is very reconfigurable and can be implemented as a bandpass ADC.

Keywords

Successive approximation ADCDelta-sigma modulationOperational amplifierComputer scienceNoise shapingBit (key)Electronic engineeringVoltage

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