Book Chapter10.1016/b978-0-12-417750-5.50039-7

MINIMIZING THE NUMBER OF INTERNAL STATES IN INCOMPLETELY SPECIFIED PULSE INPUT ASYNCHRONOUS SEQUENTIAL MACHINES

G. Frosini,G.B. Gerace-1971-01-01-Elsevier eBooks

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Keywords

Asynchronous communicationSequential logicAsynchronous circuitElectronic circuitComputer scienceState (computer science)Truth tableAlgorithm

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