Implementation of a memory interface in FPGA

TL;DRAbstract

There are certain computational problems, where processing data using general purpose computer processing units is ineffective and time-consuming. FPGA (Field-Programmable Gate Array) integrated circuits allow designers configuring their operations for specific problems. This way, data can be processed on a hardware level. The purpose of this thesis is to design and implement a solution that will allow sending data from computer to FPGA and saving it in RAM (Random Access Memory), which is embeded in the FPGA development board. No logic, that could process data on FPGA will be implemented. Two Xilinx FPGA development boards are used for the purpose of this thesis - a simple board based on Spartan-3A FPGA family and an advanced board based on Virtex-6 family. It turns out that Spartan-3A based development board is unsuitable for the intended design, therefore Virtex-6 based board is used. The thesis describes the implementation of memory controller using MIG (Memory Interface Generator)

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