A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging
2007 · 825 citations
https://doi.org/10.1109/iedm.2007.4418914
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17
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8
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J. Hicks is an academic researcher. The author has contributed to research in topics: Advanced Wireless Communication Techniques & Wireless Communication Networks Research & Cooperative Communication and Network Coding. The author has an h-index of 8, co-authored 15 publications.
https://doi.org/10.1109/iedm.2007.4418914
https://doi.org/10.1109/vlsit.2012.6242496
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